The
Invisible
Chain

Before a transistor is printed, before a wafer is grown, before polysilicon is refined — there is quartz. Silicon dioxide. A rock. The entire semiconductor industry begins with mining.

What almost never gets reported is where it starts: a small district in the mountains of North Carolina called Spruce Pine. The pegmatite deposits there are geologically unique — formed 380 million years ago, impurity levels below 20 parts per million. No comparable deposit is in commercial production anywhere else on earth.

The quartz is converted into trichlorosilane gas, purified through repeated distillation, then redeposited as polycrystalline silicon rods via chemical vapour deposition. The process runs above 1,000°C for weeks. The result: silicon purified to one part per billion contamination — the purest industrial material manufactured at commercial scale.

Six companies globally control this supply. The process is energy-intensive, geographically concentrated, and not easily replicated. China dominates solar-grade polysilicon; electronic-grade — the kind a chip needs — remains concentrated in Germany, the US, South Korea, and Japan.

Polysilicon is melted and a seed crystal slowly pulled upward — the Czochralski process — growing a single continuous silicon crystal lattice over 24–48 hours. The result is an ingot up to 300mm in diameter and 1.5m tall. It is sliced into wafers roughly 0.8mm thick using diamond wire saws, then polished to atomic flatness.

Three Japanese and German companies supply approximately 80% of the world’s silicon wafers. There are zero significant US producers. Qualifying a new wafer supplier at a leading fab takes 12–18 months — which means this layer cannot respond quickly to disruption, regardless of how much money is thrown at it.

Advanced chip fabrication consumes hundreds of exotic chemicals — ultra-pure neon for laser sources, fluorine for etching, argon for deposition, photoresist for patterning, CMP slurry for planarisation between layers. Each must be delivered at parts-per-trillion purity. A single chemical substitution requires years to qualify and can halt a production line.

The neon story is instructive. Before 2022, Ukraine supplied roughly half the world’s neon — a byproduct of its steel industry. When war disrupted supply, the industry scrambled. The supply chain has since restructured, but the vulnerability was exposed: a steel mill in Mariupol was a dependency of every semiconductor fab on earth.

EUV lithography machines project 13.5nm wavelength light — generated by firing a CO₂ laser at a tin droplet 50,000 times per second inside a near-vacuum chamber — through a photomask onto the wafer, printing transistors smaller than a virus.

ASML is the only company on earth capable of manufacturing EUV machines. One factory. Veldhoven, Netherlands. Each costs $380M, contains 100,000 components from 5,000 suppliers across 40 countries, and takes roughly a year to build. They ship approximately 50 per year. The optics are polished by Carl Zeiss to tolerances measured in atoms.

The fab is where circuit patterns become transistors. Deposition, lithography, etch, ion implantation, anneal, planarisation — each step building one layer of a three-dimensional transistor structure at 3nm pitch. A modern GPU die contains over 80 billion transistors. The process takes three to four months per wafer.

TSMC manufactures approximately 90% of the world’s most advanced logic chips. Its fabs are in Taiwan — 160km from the Chinese mainland. TSMC’s expansions in Arizona and Japan are real, but they will not reach parity with Taiwan’s capacity or process maturity for years.

The GPU die and HBM memory stacks must be bonded together on a silicon interposer — TSMC’s CoWoS process. This 2.5D integration is what enables the extreme memory bandwidth AI workloads require. It used to be considered unglamorous back-end work. Then it became the binding constraint on the entire AI supply chain.

In 2024, TSMC Chairman Mark Liu said publicly: “It is not the shortage of AI chips — it is the shortage of our packaging capacity.” The substrate manufacturers beneath CoWoS — Unimicron and Ibiden, barely known outside the industry — briefly held more power over global AI accelerator supply than Nvidia’s own production lines.

High Bandwidth Memory — HBM — is DRAM stacked vertically in 8–16 layers, connected by thousands of through-silicon vias, bonded directly onto the interposer beside the GPU die. It delivers memory bandwidth an order of magnitude higher than conventional DIMM. Without it, the GPU is an incomplete assembly.

SK Hynix supplies approximately 70% of HBM for AI accelerators. By mid-2025 their allocation was fully committed through to 2026. The yield complexity of stacking DRAM dies through TSVs at commercial scale means meaningful new supply from Micron or Samsung is measured in years, not quarters.

Before a single atom is processed, every chip must be designed in software — simulated and verified across billions of logic gates using Electronic Design Automation tools. Synopsys and Cadence together control approximately 85% of the EDA market. Every chip designed by every company on earth — including chips inside competing tools — was designed using their software.

US export controls on EDA software to China are considered one of the most powerful levers in the technology trade war. Without Synopsys or Cadence, China cannot design competitive advanced chips — regardless of its fab capabilities.